Exploiting Deterministic TPG for Path Delay Testing

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摘要 Detectionofpathdelayfaultsrequirestwo-patterntests.BISTtechniqueprovidesalow-costtestsolution.Thispaperproposesanapproachtodesigningacost-effectivedeterministictestpatterngenerator(IPG)forpathdelaytesting.Givenasetofpre-generatedtest-patterngenerator(TPG)forpathdelaytesting.Givenasetofpre-generatedtest-pairswithpre-determinedfaultcoverage,adeterministicTPGissynthesizedtoapplythegiventest-pairsetinalimitedtesttime.Toachievethisobjective,configuablelinearfeedbackshiftregister(LFSR)structuresareused.TechniquesaredevelopedtosynthesizesuchaTPG.whichisusedtogenerateanunordereddeterministictest-pairset.TheresultingTPGisveryefficientintermsofhardwaresizeandspeedperformance.SImulationofacademicbenchmarkcircuitshasgivengoodresultswhencomparedtoalternativesolutions.
机构地区 不详
出版日期 2000年05月15日(中国期刊网平台首次上网日期,不代表论文的发表时间)
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